Design of an Arbiter for DDR3 Memory

A regular RAM module is designed for use with one system. This project designed a memory arbiter in Verilog that allows for more than one system to use a single DDR3 RAM module in a controlled manner. The arbiter uses fixed priority scheme with an additional timeout feature to avoid starvation. The design was verified in simulation and validated on a Xilinx ML605 evaluation board with a Virtex-6 FPGA

Determining the Applicability in Costa Rica of Practices & Policies Used in Sustainable Industrial Parks Worldwide

Costa Rica has the potential for economic growth and environmental accountability in future industrial development. Our research focused on the techniques that can lead to sustainability in industrial parks. Through conducting site assessments and surveys with industrial park managers, we evaluated the potential for sustainability in Costa Rica\u27s industrial parks. We created a database of industrial parks in Costa Rica and a sustainability checklist, and conducted a comparative analysis of international and domestic policies concerning sustainability. Our research revealed that Costa Rica\u27s industrial parks have the interest and potential to become sustainable, they just need the necessary tools to accomplish this